: Subhashis Roy, Joyashree Bag, Subir Kumar Sarkar
: Department of Electronics &Telecommunication Engineering, Jadavpur University, Kolkata-700032, India
Efficient navigation in mobile robotics generally needs solving two important problems pertaining to the knowledge of the position of the robot and a motion control strategy. The problem becomes even more critical when no prior knowledge of the environment and surroundings is available where it is moving or in operation. These three independent tasks need to be solved in conjunction with the mobile robot navigation. Hence, a processor for the mobile robot navigation system has been proposed, designed, and implemented in the present work using Xilinx ISE14.3 simulation tools and Kintex7 FPGA board. Kintex™-7 FPGA board provides a wide-ranging, high-performance development with demonstration platform. The processor is efficient in avoiding collisions with mobile robots as well as with physical objects using RFID technology and a suitable algorithm. The use of RFID is justified because of RFID’s computational simplicity compared to many of its counterparts in the state of the art. In order to improve the throughput and flexibility in the present processor implementation, CORDIC algorithm has been employed because of the simplicity of the operations incorporated in it, which make it very well suitable for VLSI implementation. Cadence design analyzer using 0.18μm CMOS technology shows that the throughput of this architecture is very high with a core area of 0.102 mm^2 only.
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O. Khubitz, R. D. Matthias and O. Berger, 2002. Application of radio frequency identification devices to support navigation of autonomous mobile robots, IEEE Vehicular Technology Conference, pp. 256-264,
H. Chae and K. Khan, December 2005. Combination of RFID and vision for mobile robot localization, Intelligent Sensors,Sensor Networks and Information Processing Conference, Munich, Germany, pp. 75-80.
T. Tsukiyama, 2005. Global navigation system with RFID tags, Proceedings of SPIE, vol. 6006, pp. 412-419.
J. E. Volder, Sept. 1959. The CORDIC trigonometric computing technique, IRE Trans. Electron. Computers, vol. EC-8, pp. 330-334.
J. E. Volder, 2000. The birth of CORDIC, J. VLSI Signal Process., vol. 25. pp. 101-105.
J. Bag, S. Roy, P. K. Dutta, and S. K. Sarkar, 2014. Design of a DPSK Modem Using CORDIC Algorithm and Its FPGA Implementation", IETE Journal of Research. vol. 60, no. 5, pp. 355-363.
J. S. Walther, 2000. The story of unified CORDIC, J. VLSI Signal Process., vol. 25, no. 2, pp. 107-112.
Y. H. Hu and S. Naganathan, 1990. A Novel implementation of chirp Z-transform using a CORDIC processor, IEEE Trans. Acoust, Speech, Signal Process. vol. 38, no. 2, pp. 352-354.
Y. H. Hu. 1992. CORDIC based VLSI Architectures for Digital Signal Processing’, IEEE Signal Processing Magazine, pp.16-35.
D. Perry, 2002. VHDL: Programming By Example.
V. A. Pedroni, 2010. Circuit Design and Simulation with VHDL .
P. J. Ashenden, 2008. The Designer's Guide to VHDL.
J. Bag, K. M. Rajanna and S. K. Sarkar, 2012. Design and VLSI Implementation of Anti -collision Enabled Robot Processor using RFID technology, Int. Journal of VLSI design & Communication Systems (VLSICS). vol. 3, no.6, pp 51 -65